为何在OSC有源晶振Vdd脚与GND脚之间增加一个旁路电容?

为何在OSC有源晶振Vdd脚与GND脚之间增加一个旁路电容?

为何在有源晶振Vdd脚与GND脚之间增加一个旁路电容?晶诺威科技在有源晶振DATA BASE中,解释如下:

To ensure optimal oscillator performance, place a by-pass capacitor of 0.1uF as close to the part as possible between Vdd and GND pads.

为了确保振荡器最佳性能,请增加一颗0.1 uF 旁路电容,并将其尽可能靠近 Vdd 和 GND 焊盘之间的部分。0.1 uF 旁路电容的作用是降低来自电源杂波对晶体振荡器的负面影响。

All bypass capacitors should be placed as close as possible to the pins and should have a low-resistance and low-inductance connection to ground to achieve the best performance.

所有旁路电容应尽可能靠近引脚,并应具有低电阻和低电感接地连接,以实现最佳性能。换而言之,旁路电容应尽可能安装在靠近石英晶体振荡器电源的地方。布线距离越长寄生电感越大,高频侧的阻抗随之变大。布线应先连接旁路电容器后连接到电源线。这样,噪音必将通过旁路电容,从而提高噪音去除效果。

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