How to obtain favorable phase noise? 如何获得良好的相位噪声？

1. Secure a favorable Q value of the oscillation circuit. Use a crystal with a high Q value, and lower the resistance loss of the oscillation circuit to obtain Q higher in the oscillation loop.
确保振荡电路的Q值良好。使用Q值高的晶体，降低振荡电路的电阻损耗，在振荡环中获得更高的Q。

2. Minimize the device noise. Select a device characterized by minimal values in noise figure (NF), and flicker corner frequency (Fc) to minimize thermal noise, shot noise, and flicker noise from the semiconductor device.

最大限度地减少设备噪声。选择以噪声系数（NF）和闪烁角频率（Fc）最小值为特征的器件，以便最小化半导体器件的热噪声、散粒噪声和闪烁噪声。

3. Do not use a frequency multiplication scheme using a PLL circuit because it causes the degradation of phase noise.
不要使用PLL电路倍频方案，因为这会导致相位噪声下降。

4. Enhance the drive level of the oscillator circuit as high as allowed.
尽可能提高振荡器电路的驱动电平。

5. Since the noise characteristic is a relative value of the signal level to the noise power, the higher the signal level is, the more favorable the noise characteristic is. This is, however, on condition that the crystal be used in a domain in which its drive level characteristic is flat.
由于噪声特性是信号电平与噪声功率的相对值，因此信号电平越高，噪声特性越有利。然而，前提条件是要保证驱动电平必须处于对晶体的安全驱动区间。

6. Overtones provide a high Q value, being useful in the vicinity of the offset. Note, however, pay attention to the degradation of phase noise by the fluctuation of frequency as that overtones allow the resistance loss in the crystal and the oscillation circuit to grow and that the operation at a higher drive level increases the frequency fluctuation that leads to the deterioration of the signal purity.
泛音提供高Q值，在偏移附近很有用。但是请注意，相位噪声会因频率波动而降低，因为泛音会使晶体和振荡电路中的电阻损耗增加，并且在较高驱动电平下工作会增加频率波动，从而导致信号纯度下降。

7. Restrict noise from the power supply by placing bypass capacitors in the shortest distances to the power supply and the ground terminal.
通过在离电源和接地端最短的距离放置旁路电容器来限制电源的噪声。