关于无源晶振电路中外接电容CL1和CL2的选取，晶诺威科技解释如下：

英文解释：

For CL1 and CL2,it is recommended to use high quality ceramic dielectric capacitance (typically) between 5pF and 33pF designed for high-frequency applications. Usually CL1 and CL2 have the same parameters. The capacitive reactance of PCB and MCU pins should be taken into account when selecting CL1and CL2. The Quartz crystal  and load capacitance must be as close to the oscillator pin as possible to reduce output distortion and stability time at startup.

中文解释：

1、 建议外接电容CL1和CL2等值选取，区间一般为5pF~33pF；

2、 建议选择专为高频应用而设计的高品质陶瓷介电电容；

3、 选择 CL1 和 CL2 时，应考虑 PCB 和 MCU 引脚的容抗在内；

4、晶振和外接负载电容应尽可能靠近芯片时钟引脚，以便提高晶振起振的稳定性。